Majlesi Journal of Telecommunication Devices 2021-09-11T07:40:44+00:00 Dr. Mohsen Ashourian Open Journal Systems <p>The scope of MJTD includes all aspects of telecommunication device and information technology, from mathematical modeling to practical engineering. The editorial board is international and original unpublished papers are welcome from throughout the world. The journal is devoted primarily to research papers, but very high quality survey and tutorial papers are also published.</p> <p>There is no publication charge for the authors.</p> Controller Placement in SDN with Low Latency Using Meta-heuristic Algorithms 2021-09-11T07:40:43+00:00 Mohammad Erfan Mehrabian Reza Gholamrezaei <p>Software-Defined networks (SDNs) are a new generation of computer networks that have eliminated many of the problems of traditional networks. These networks use a three-tier architecture in which the physical layers, controller, and management are located at different levels. This new architecture has made the network very dynamic, and many of the previous problems in the network have been solved. As the size of the network increases, using a controller across the network will cause issues such as increasing the average latency between the switches and the controller, as well as forming a bottleneck in the controller. For this reason, it is recommended to use multiple physical controllers on the control plane. Due to the cost of purchasing and maintaining the controller, it is necessary to solve the mentioned problem with the least controllers. The question is, to achieve a goal such as reducing latency to an acceptable threshold, at least how many controllers are needed, where the controllers should be located, and which switches should be monitored by which controller? Since this is an NP-Hard problem, methods based on meta-heuristic algorithms can be effective in solving it. In this article, we have solved the problem of controller placement in software-based networks to reduce latency using the cuckoo meta-heuristic algorithm. The simulation results show that the efficiency of our proposed method is between 16 to 70 percent better than the method proposed by the PSO algorithm.</p> 2021-04-26T16:20:20+00:00 ##submission.copyrightStatement## Designing Ultra-low-power Cardiac Pacemaker with Quantum Cellular Automation Technology 2021-09-11T07:40:44+00:00 Mojdeh Mahdavi Mohammad Amin Amiri <p>The heartbeat is triggered by a sinoatrial node in the heart. If the sinoatrial node is disrupted for any reason or if there is a problem with the heart's electrical signal path, the heart rate will decrease or become impaired; in which case the cardiac pacemaker could control the heart function. The pacemaker is an electrical stimulator that causes the heart to expand and contract and triggers pulses to the heart when needed or permanently. Since the pacemaker is placed inside the patient's body, it should be designed based on the minimum power consumption. Besides, frequency adjustment in this device is necessary to regulate heart rate in a variety of arrhythmias. In this paper, logic cells of quantum cellular automata are utilized to design a pulse generator circuit in a heart oscillator, where power consumption and dimensions are minimal. An important feature of the proposed circuit is the ability to adjust the output pulse frequency. The efficiency of this circuit has been evaluated using QCAdesigner simulator and desirable results have been obtained in terms of power consumption level. The simulation results also show very low power consumption for the designed circuit.</p> 2021-08-19T06:43:50+00:00 ##submission.copyrightStatement## Improve code word interference cancellation (CWIC) technique in heterogeneous network 2021-09-11T07:40:44+00:00 Simin Khazraei Shoulaifar Maryam Yahyanezhad <p>This paper first examines performance of (code word interference cancellation) CWIC for downlink non orthogonal multiple access (NOMA) combined with 2-by-4&nbsp; multi-user (MU)-MIMO, taking into account the disadvantages of the CWIC receiver, such as complex receiver structure, high volumes of network overhead and high delay, we offer a way to improve the efficiency of the CWIC receiver. CWIC receiver detects, decodes and cancels all interference signals in several steps, from large to small, respectively. The number of interference cancellation stages depends on the number of interference signals. The proposed receiver only cancels the intense interference signal. That's why it's called CWIC-II (Intense Interference). Finally, using simulation, we show that CWIC-II receiver reduces latency and improves throughput. The complexity problem of the CWIC receiver structure is also resolved. In the end, a method has been developed to resolve the problems of the proposed receiver.</p> 2021-08-19T06:44:01+00:00 ##submission.copyrightStatement## Analysis and Evaluation of Increasing the Throughput of Processors by Eliminating the Lobe’s Disorder 2021-09-11T07:40:44+00:00 Saeed Talati Seyed Morteza Ghazali MohammadReza Hassani Ahangar Seyed Mohammad Alavi <p>In modern radars, the design is such that radar vulnerability to noise disturbance is significantly reduced. This dramatic decrease is due to the fact that radars are always trying to increase their capability against the heavy clutter they receive from the ground. Radars use antenna sidelobes to reduce clutter. By reducing the antenna sidelobes, the vulnerability of the radar to the heavy clutches of the sidelobes is reduced, which also reduces the vulnerability to sidelobe disturbance. In this article, we try to examine the reduction of clutter causing the reduction of vulnerability to disorder.</p> 2021-04-30T00:00:00+00:00 ##submission.copyrightStatement## Design and Implementation of 4:1 Wilkinson Power divider 2021-09-11T07:40:44+00:00 mehdi Forouzanfar <p>In this paper, 4:1 Wilkinson and Gysel combiner are designed and simulated for high-power applications. Since Wilkinson power combiner provides broad bandwidth characteristics and low insertion loss, it can be an appropriate candidate for realizing the required power combiner. The fabricated combiner provides a maximum insertion loss of about 0.5dB and Max S<sub>11</sub> and S<sub>22</sub> of about -10 dB in the frequency band of 8-9.2 GHz. It was designed in such a way that it can easily be tuned to compensate phase mismatch between four different inputs with a precision of about 15 degrees.</p> 2021-09-11T07:25:14+00:00 ##submission.copyrightStatement## Design and Fabrication of a Lowpass Filter Using a New Butterfly-Shaped Defected Ground Structure 2021-09-11T07:40:44+00:00 Majeed Rashid Zaidan Vahid Rezaeian Saber Izadpanah Toos <p>In this paper, a new Defected Ground Structure (DGS) is introduced and analyzed. The effect of the structure’s dimensions on the location of the attenuation pole and the cutoff frequency to study the frequency characteristics is investigated. In the following, a lowpass filter with 3 dB cutoff frequency at 3 GHz is designed and optimized using the proposed defected ground structure, and its frequency characteristic is reported. The designed lowpass filter is fabricated to verify the simulation process. Also, simulation results, the equivalent circuit, and the measured results with the Network Analyzer are compared.</p> 2021-09-11T07:39:13+00:00 ##submission.copyrightStatement##