Overview of Low-Voltage Low-Power Design Techniques and Design Low-Voltage Low-Power Low-Noise Operational Amplifier

  • Saber Izadpanah Tous Sadjad Institute for Higher Education
  • Mahmoud Behroozi Sadjad Institute for Higher Education
  • Hooman Nabovati Sadjad Institute for Higher Education
  • Vahid Asadpour Sadjad Institute for Higher Education

Abstract

In this paper an overview of circuit techniques dedicated to design low-power low-voltage is presented. These techniques (a) dynamic threshold voltage MOSFET (DTMOS)  (b) bulk-driven and (c) current-driven bulk (CDB) are applied to design low-power low-voltage and low-noise CMOS operational amplifier (op amp) using sub-threshold region of MOSFET for bio-medical instrumentation operating with a 0.6 V supply. The operational amplifier is designed and simulated using TSMC 0.18μm CMOS technology. With DTMOS technique, the open loop gain is 60.51 dB, the unity gain-bandwidth (UGBW) is 12.08 kHz, phase margin is 52.3 degree and power consumption is 53.21 nW. With bulk-driven technique, the open loop gain is 49.04 dB, the unity gain-bandwidth is 3.32 kHz, phase margin is 71.96 degree and power consumption is 53.3 nW. With CDB technique, the open loop gain is 53.54 dB, the unity gain-bandwidth is 19 kHz, phase margin is 50 degree and power consumption is 55.79 nW. DTMOS technique provides high open loop gain, CDB technique provides high unity gain-bandwidth and bulk-driven technique provides better phase margin. Also DTMOS technique has less input-referred noise than the other methods.

References

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Published
2013-05-23
How to Cite
Izadpanah Tous, S., Behroozi, M., Nabovati, H., & Asadpour, V. (2013). Overview of Low-Voltage Low-Power Design Techniques and Design Low-Voltage Low-Power Low-Noise Operational Amplifier. Majlesi Journal of Telecommunication Devices, 2(2). Retrieved from http://journals.iaumajlesi.ac.ir/td/index/index.php/td/article/view/97
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Articles